I had a quick look at the StrongARM cache clean code last night and noticed it’s in a tight loop, that might fall within one cache line.It's on my list of things to try to find a workaround, or at least improve.
There’s a bizarre undocumented erratum on some ARM’s where a loop within a cache-line can cause IRQ’s to be dropped. I’ve seen it occur a couple of times when debugging games, but never pinned down the SOE. Anyway, I’ll unroll the code so it falls across two cache-lines and we’ll see if it makes any difference here.
It looks like at some point I also tried enabling IRQ when it’s cleaning the cache, as the code is commented out, but that’s not going to end well if it’s just written an IRQ handler to memory!
For the most part, the JIT avoids full cache cleans, preferring cache-line cleans instead as that’s implemented by StrongARM. What StrongARM doesn’t implement is a full cache clean. That wasn’t added until later and is implementation defined on ARMv4, so can’t be used for the IOMD builds.
When the JIT has translated a large chunk of code, it falls back to performing a full cache clean, so I might also be able to improve things by reducing the amount of code the JIT translates when it’s running on StrongARM. That’s going to take a while to implement though as it would need to track the translated code size, where currently it’s tracking the original instruction count.
I’ll try unrolling the cache clean loop first, as that’s a trivial change.
Statistics: Posted by sirbod — Sat Nov 02, 2024 6:37 am