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32-bit acorn emulators • Re: Hey, you, Reptons!

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Noting belatedly that I've added a processing delay between pixel data being enqueued for output and it actually being transcribed; I've yet to hit upon either a meaningful mental model or documentation about what causes the differing per-bpp latencies
I believe the differing HDSR/HDER values are a side-effect of the eight word DMA buffer and how VIDC steps through it depending on the bpp. You can probably completely mess that up by altering the CR DMA request bits.

Although it's not specifically stated, the geometry register values appear to be zero based so are all M-1. I'd also guess VIDC either processes two pixels at a time or pipelines two, so horizontal values have to be divided by 2.
what would be expected to happen if there were a colour-depth change mid-line
I'm not sure that's possible, I believe bpp is fixed at Flyback along with the geometry.

Steve can probably correct me here, but I believe only the palette can change mid-line. It might also be possible to get multiple cursors on screen if the DMA FIFO is observed, although I've never tried.

Statistics: Posted by sirbod — Tue Apr 30, 2024 1:47 am



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