Hello.
I have reverse engineered the APTL Sidewise ROM / RAM (1038, iss4) PCB to produce a schematic. Please find attached.
Comments & errata welcome.
100% my own interpretation of this design, hence errors expected etc, E&OE
I have also copied the PCB.
Andy
I have reverse engineered the APTL Sidewise ROM / RAM (1038, iss4) PCB to produce a schematic. Please find attached.
Comments & errata welcome.
100% my own interpretation of this design, hence errors expected etc, E&OE
I have also copied the PCB.
Andy
Statistics: Posted by underwurlde — Thu Dec 18, 2025 6:36 pm