My understanding is that I could solder clip leads to pins 1 and 27 on a 32K SRAM, and then clip on to pin 12 on IC76 (A15) and pin 8 on IC77 (write enable) and then I would have access to the full 32k, but spread across two banks in the memory map.The system is only designed for a maximum of 16K bytes per ROM socket. So only half of a 32K byte SRAM chip will be available unless the address line A14 (pin 1) is connected to an output pin of the ROM selection latch chip.
Note that as pin 1 on the Beeb board is not connected to anything, even if you are only going to use half of a 32K byte SRAM chip, pin 1 needs connecting to either 0V/GND or +5V/VCC so that the chip gets a valid logic level.
Having a ROM expansion board changes things, without that, each of the four sockets on the Beeb board responds to four ROM numbers as follows:
IC52 - lowest priority sideways ROM socket (accessed with ROM numbers 0, 4, 8, 12)
IC88 - sideways ROM socket (accessed with ROM numbers 1, 5, 9, 13)
IC100 - sideways ROM socket (accessed with ROM numbers 2, 6, 10, 14)
IC101 - right most sideways ROM socket, that is also the highest priority sideways ROM socket (accessed with ROM numbers 3, 7, 11, 15)
Hence by connecting pin 1 to IC75 pin 12, the bottom half of a 32K SRAM in IC52 socket will respond to ROM numbers 0 and 8, the top half of a 32K SRAM in IC52 socket will respond to ROM numbers 4 and 12.
For socket IC88, it's ROM numbers 1 and 9 for one half and ROM numbers 5 and 13 for the other half.
It's similar for sockets IC100 and IC101.
But the ROM expansion board changes things.
Note there are other wiring changes needed if fitting SRAM.
Mark
Also, I should ask if there is a difference between a 652256 (which was recommended) and a 65256? I have a source for the latter, but not the former.
Statistics: Posted by DistantStar001 — Sat Dec 06, 2025 12:14 am