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RPCEmu Support and Development • Re: SIGSEGV handlers are ignored on RPCEmu

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I've noticed with RPCEmu that if a program writes to an invalid memory address, it doesn't appear to produce exceptions that can be handled by RISC OS, which is something that normally works on real hardware.

I've attached a program that demonstrates this. When built with GCC + UnixLib and run on an actual RiscPC with RISC OS 5, it'll report that the signal has been handled correctly after writing a word to address 0. With RPCEmu however, it'll report that the signal handler was ignored instead.
Think that RPCEmu doesn't always fault accesses to pages that are mapped in.

Ah, see https://forums.jaspp.org.uk/forum/viewtopic.php?t=700 for 'will not work under RPCEmu as it does not generate Page Faults when User mode writes to pages with Supervisor only write permissions'

Statistics: Posted by SKS1 — Fri Nov 28, 2025 12:20 am



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