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32-bit acorn hardware • Re: A3000 RTC Frozen when Powered Off

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It clearly DOESN'T reset that bit, or this hack wouldn't have any effect.
Yes, but what I'm wondering is that perhaps a CMOS reset does start the clock correctly (clears bit 7), but some buggy version of SetStation then stops the clock again (sets bit 7), and the hack is then required to restart the clock without doing a further CMOS reset (and losing the SetStation config).
SetStation does nothing more than write byte 0 of the CMOS RAM and the checksum at byte 239. And the only reason it's not just a *configure or *fx is to prevent wee urchins in schools from changing it. I don't see why anyone would point the finger at SetStation "being buggy" vs any other *configure or *fx 162 command that talks IIC suddenly randomly writing wrong things to the RTC. This is how FUD rumours start. [-X

Statistics: Posted by IanJeffray — Tue Nov 18, 2025 2:43 am



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