Some jitter in the position of the edges is normal, due to the way the 6MHz clock is generated. The pattern should repeat over a period of 500ns (3 clock cycles). Because of the way the SAA5050 works, both edges are significant. The "BBC" CPLD Firmware contains a set of six programmable offsets to adjust the pixel sampling points to accomdate the clock asymmetry. Running the calibration process adjusts these offsets to reduce sampling errors. That works better with a reasonable amount of text/graphics on the screen. I typically calibrate using the STH SD Card Menu.Is the variance in the frequency of the 6MHz clock normal?
What Pi Firmware and CPLD Firmware is your RGBtoHDMI running? Also, are you using the analog version or the digital only version?
Some photos of the setup might help, as would some screen caps showing the sort of errors that are creeping in.
Dave
Statistics: Posted by hoglet — Mon Feb 26, 2024 9:12 am