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programming • Re: CPLD Coding - Boolean vs Bitwise Operations

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Quick update on a couple of fronts...

Firstly (and a bit off topic), the PSU:
A few weeks ago when starting to rework my V2 boards, there was an almighty flash from within the PSU of my beeb. I think it came from the switch, but I'm not too sure. I tried switching the PSU back on, but it was dead. A quick check revealed that the internal 2A fuse and the 3A fuse in the wall plug had both blown.

I wasn't wanting to get too distracted with this, so after a bit of cursing, I located a spare PSU, swapped it out, and put the broken PSU aside to look at later.

This weekend I had the opportunity to have a quick look at the PSU. Given the way it failed, I suspected the bridge, so that was pulled and, right enough, one of the diodes had failed short circuit. So I ordered replacement fuses and bridges from RS. Received the package yesterday to discover only the fuses had been supplied. A quick discussion with the guy at the local trade counter revealed that the bridge had gone out of stock, even though it was indicating stock when I placed the order. So I selected an alternative part with flatter / slightly wider pins, and a different pin spacing. Those bridges arrived today, so after widening the PCB holes very slightly, and with a bit of pin bending, I was able to fit the new bridge. I fitted a new internal fuse, installed a new power cable (just because I don't like the original plug with the exposed metal pins), and the PSU sprung back into life. Yah! Caps have previously been replaced, so I didn't bother with those.

Secondly (and more on topic), the CPLD code:
The IntegraB V2 board uses a 4Mbit (512k x 8bit) RAM IC. Within the CPLD this has been split into 32 different 16kbyte chunks. These are assigned as follows:
  • Chunks 0..15: Mapped into the 16 standard SWROM banks on the beeb
  • Chunks 16 & 17: 32k assigned to Shadow RAM (20k) and Private RAM (12k)
  • Chunks 18 & 19: Currently unused
  • Chunk 20: Used as the second bank for a 32k based PALPROM
  • Chunk 21: Used as the second bank for a second 32k based PALPROM
  • Chunks 22..24: Used as the second through forth banks for a 64k based PALPROM
  • Chunks 25..31: Used as the second through eighth banks for a 128k based PALPROM
In normal operation, chunks 16..31 are not readily available for reading or writing. So, the CPLD has a special 'Recovery Mode' (long press of BREAK), which makes these chunks available.

However, I noticed yesterday that chunks 16 thru 19 were not configured to be available in Recovery Mode, so I had to modify the code to make those chunks available. I also noticed that (under certain conditions) it was possible to select two chunks at the same time, which would have resulted in the wrong memory addresses being accessed. I've added some additional logic to prevent this from happening.

I was a bit worried that I wouldn't be able to fit these changes, and initially it wouldn't fit. But I re-arranged the logic slightly, and have been able to make it all fit. Phew!

I'm still not able to swap the !RDS term for RnW, or remove the !bbc_nRST term from the PALPROM logic, though. It's a bit hit of miss, getting the code to fit!

Latest changes pushed to the github Rev02b branch.

Statistics: Posted by KenLowe — Wed Aug 21, 2024 7:48 pm



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